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International Symposium on Power Semiconductor Devices and ICs (ISPSD)
Addressing the Challenges of Small Pad Probing
Smaller pads not only utilize less device real estate, they also allow sacrificial test structures to be placed in scribe lines, meaning process control monitoring and device characterization can be performed without using valuable space for sellable circuits. Probing pads with large dimensions is relatively simple with conventional probe technologies.
However, when trying to probe pad sizes of 50 um x 50 um or less, side skate becomes a challenge as it causes wider probe marks and can change the probe pitch with overtravel. Read how InfinityQuad solves this and other challenges of probing small pads.Tech Brief: Addressing the Challenges of Small Pad Probing
LED Test- Challenges for Equipment Manufacturers
As markets for display backlighting and solid-state lighting grow, equipment vendors adapt to meet the needs of a rapidly changing industry. New equipment must accommodate the range of test configurations found across the spectrum of manufacturers. At the same time, the equipment must keep the cost of test low to help reduce the overall cost of LEDs and contribute to the successful adoption of LED technology in consumer applications.
Cascade Microtech Reduces Cost-of-Ownership and Delivers Probing Expertise
In a global response to market requirements to reduce the cost-of-ownership while at the same time meeting the ever-demanding complex probing challenges, Cascade Microtech is implementing three new programs to drive down ownership costs and provide customers with increased access to experts in probe technology. Read more ...
Cascade Microtech Improves Yield of Multi-site RF Production Test with New S-Technology Pyramid Probe Cards
S-Technology™ for improved contact physics. S-Technology provides a unique mechanical architecture for Pyramid Probe® cards designed to consistently deliver evenly distributed contact force for solder bump technologies found in today's demanding high-volume production test environments. Read more ...
New Approach to Wafer-level Unattended Over-temperature Test Reduces Test Time and Increases Throughput
Most test plans call for gathering wafer test data over a series of temperatures. Thermally induced drift between probes and pads can result in alignment errors with most wafer probers, even with so-called semi-automatic probers. To maintain electrical contact, the alignment must be corrected at each new temperature. Since most analytical probers are not equipped with probe-to-pad-alignment (PTPA) systems, this alignment must be done manually, increasing process time and limiting test productivity. Read more ...



